China's Peking University develops light-linked chips that run AI 149 times faster than a GPU

Researchers at Peking University have run an AI inference task nearly 149 times faster than a single GPU while using about one-ninth of its computing power.

Their system links standard electronic chips with an all-optical network, replacing the copper wiring that normally shuttles data between processors, according to a study published May 19 in the journal National Science Review.

The South China Morning Post likened the design to snapping together Lego blocks.

Electronics For You, a trade publication, described it as an "all-optical supernode" built to ease the bandwidth, latency and energy-efficiency bottlenecks that pile up when many chips work on one AI job.

Rather than stacking more GPUs and building larger data centers, the team paired modest chips with tailored algorithms to cut both latency and the compute a task demands.

The group, led by corresponding authors Shu Haowen and Wang Xingjun, built its system around field-programmable gate arrays, or FPGAs, reprogrammable chips prized for parallel processing and used in everything from defense guidance systems to autonomous driving. Five of them were linked through a custom optical switch, each running one layer of a neural network.

They ran a five-layer network that stripped noise from images in the Fashion-MNIST dataset, processing 1,000 images of 32,768 bits each in 105.16 microseconds. To confirm the optical link added no errors, the researchers ran the same images on the GPU and found the two outputs nearly identical pixel for pixel.

That GPU, a commercially available card rated at 16.96 teraflops, took 15.6 milliseconds. The five FPGAs delivered a combined 1.969 teraflops, about 11.6% of the GPU's capacity, yet finished nearly 149 times faster, the study reported.

Nvidia GB10 Grace Blackwell Superchip is displayed at the company's GTC conference in San Jose, California, U.S., March 19, 2025. Photo by Reuters

The link rests on two custom chips. A silicon photonic transceiver running at 400 gigabits per second converts electrical signals into light and back, and a 16×16 non-blocking optical switch routes the traffic with a total loss at or below 5 decibels, low enough to move data error-free without optical amplification. By packing four wavelengths onto a single fiber, the switch lets each chip occupy one port, so the network can scale to 16 processors and 6.4 terabits per second of switching bandwidth.

The bottleneck it sidesteps is the "memory wall." On a GPU, each layer of a neural network writes its intermediate results to memory and reads them back, with every layer waiting for the previous one and processors sitting idle. Across the optical link, results pass straight from one layer to the next like an assembly line, bypassing memory and keeping every chip busy; the five-chip system ran at 94.7% of its theoretical peak.

"Specific objectives can be realized under limited computational resources when algorithms, processor micro-architectures and chip-level interconnections are co-designed," the authors wrote. The design "can also alleviate unsustainable energy usage in data centers and optimize latency or consumption in edge-computing scenarios," they added.

The approach leans on mature, standard silicon fabrication rather than the leading-edge lithography curbed under U.S. export controls, one reason analysts have singled out silicon photonics as a front in U.S.-China technology competition, according to the Center for Strategic and International Studies. It joins a run of Chinese optical-computing results over the past year claiming large gains over Nvidia hardware, though independent reporting has stressed those wins so far hold only for narrowly shaped lab tasks.

The Peking University demonstration fits that caveat: it used only small 5×5 convolution kernels, a modest workload by modern AI standards, and reaching the full 16-chip design will require faster input and output on the FPGAs themselves, the authors noted.